[Insight-developers] The Memory Consistency Problem, something everyone should know...

[Bradley Lowekamp]

After digging a little further I think this problem may better be called "False Sharing" and there is a wikipedia page about it:
http://en.wikipedia.org/wiki/False_sharing

Additionally the common cache block size for intel processors is 64 words. And the caching protocols should maintain this consistently between processors if shared.

Brad

On Mar 16, 2012, at 3:16 PM, Lowekamp, Bradley (NIH/NLM/LHC) [C] wrote:

> Hello,
> 
> I have just made the StatisticsImageFilter go ~58X faster on my multi-core platform for large data, by fixing the cache thrashing which was going on:
> 
> http://review.source.kitware.com/#/c/4771/1
> 
> When adjacent memory is modified by different processors, it must maintain consistency across the cores. This is of non-trivial expense then considered on the per-pixel level. If anyone is looking for an example case of bad cache thrashing I think this it about as good as you can do.
> 
> I am just sending this e-mail to make sure everyone is on the look out for this type of problem, and will take a note (Jira?) of where similar enhancements can occur.
> 
> 
> Thanks for keeping an eye out,
> Brad
> 
> ========================================================
> Bradley Lowekamp  
> Medical Science and Computing for
> Office of High Performance Computing and Communications
> National Library of Medicine 
> blowekamp at mail.nih.gov
> 
> 
> 
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