[CMake] Reverse dependencies (Unix Makefiles)

[Jesper Eskilson]

Hi,

I have two targets, call them A and B. They both link with a third, 
static library called C. C attempts to invoke a function which is 
defined by however links with C, i.e. either A or B.

This is not a problem as long as A and B are executables or shared 
libraries, but if A or B is a static library which in turn is linked 
into a shared object or executable (call it D), then the command becomes 
something like

     cc ... -o libD.so -lA -lC

since the method C calls in A is unknown by the linker when A is 
processed, it is discarded. Instead, I would need the command line to 
look like this:

     cc ... -o libD.so -lA -lC -lA

but how can I do this without explicitly causing A to depend on C?

--
/Jesper